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Open source IDE for VHDL design based on Eclipse '''Author:''' Guenter Bartsch (main developer and project founder), Anton Chepurov from Tallinn University of Technology, Dr. Rainer Dorsch from IBM, Dr. Maksim Jenihhin from Tallinn University of Technology, Dr. Jaan Raik from Tallinn University of Technology '''Homepage:''' http://zamiacad.sourceforge.net/web/ '''Family:''' [[IDEFamily]] EclipseFamily '''Platform:''' Eclipse '''License:''' GPL zamiaCAD is a modular and extensible platform for advanced hardware design, analysis, and research. Its core components are * the language independent instantiation graph (IG) data structure, * the language dependent frontends generating an IG, and * applications working on the IG data structure. The frontends consist of a parser and an elaboration engine. Currently, VHDL has a complete frontend, Verilog only has a parser. Applications like a simulator and an eclipse GUI are built on top of the IG and potentially language dependent structures like the abstract syntax tree. Intended areas of use include * design entry * design analysis * design integration * simulation In these areas zamiaCAD targets the automation of currently manual design and verification tasks. This increases register transfer level design and verification engineer productivity. Currently the complete VHDL standard is supported as hardware description language, but it may be extended by adding other frontends, e.g. for Verilog. '''Screenshot:''' http://zamiacad.sourceforge.net/web/sites/default/files/Zamia_sim_annotated.png http://zamiacad.sourceforge.net/web/sites/default/files/Zamia_search_result.png
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